// ****************************************************************************** 
// Copyright     :  Copyright (C) 2021, Hisilicon Technologies Co. Ltd.
// File name     :  stars_conds_s_reg_reg_offset.h
// Project line  :  Platform And Key Technologies Development
// Department    :  CAD Development Department
// Author        :  xxx
// Version       :  1
// Date          :  2020/04/01
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V4.2 
// History       :  xxx 2021/10/22 14:39:08 Create file
// ******************************************************************************

#ifndef __STARS_CONDS_S_REG_REG_OFFSET_H__
#define __STARS_CONDS_S_REG_REG_OFFSET_H__

/* STARS_CONDS_S_REG Base address of Module's Register */
#define SOC_STARS_CONDS_S_REG_BASE                       (0x6c80000)

/******************************************************************************/
/*                      SOC STARS_CONDS_S_REG Registers' Definitions                            */
/******************************************************************************/

#define SOC_STARS_CONDS_S_REG_STARS_POOL_SEC_REG                  (SOC_STARS_CONDS_S_REG_BASE + 0x0)   
#define SOC_STARS_CONDS_S_REG_STARS_CONDS_AR_SETTING_REG          (SOC_STARS_CONDS_S_REG_BASE + 0x800) 
#define SOC_STARS_CONDS_S_REG_STARS_CONDS_AW_SETTING_REG          (SOC_STARS_CONDS_S_REG_BASE + 0x804) 
#define SOC_STARS_CONDS_S_REG_STARS_CONDS_AXI_CHECK_REG           (SOC_STARS_CONDS_S_REG_BASE + 0x808) 
#define SOC_STARS_CONDS_S_REG_STARS_CONDS_POOL_ENABLE_CTRL_S_REG  (SOC_STARS_CONDS_S_REG_BASE + 0x840) 
#define SOC_STARS_CONDS_S_REG_STARS_CONDS_POOL_DISABLE_CTRL_S_REG (SOC_STARS_CONDS_S_REG_BASE + 0x880) 
#define SOC_STARS_CONDS_S_REG_STARS_CONDS_POOL_STATUS0_S_REG      (SOC_STARS_CONDS_S_REG_BASE + 0x8C0) 

#endif // __STARS_CONDS_S_REG_REG_OFFSET_H__
